In a present manufacturing process of ULSI semiconductor devices, processing technologies for obtaining higher density and greater degrees of miniaturization are under study. A chemical mechanical polishing technology (hereinafter, referred to as CMP), one of the processing technologies under study, is an indispensable technology when, in a manufacturing process of semiconductor devices, for instance an interlayer insulating film is planarized, a shallow trench isolation is formed, and a plug and an embedding metal wiring are formed.
So far, in a manufacturing process of semiconductor devices, as a chemical mechanical polishing slurry for planarizing an inorganic insulating film such as a silicon oxide insulating film formed according to a method such as a plasma-CVD or a low-pressure CVD, a polishing slurry based on fumed silica is generally studied. The fumed-silica base polishing slurry is manufactured by grain growing according to pyrolysis of silicon tetrachloride followed by controlling the pH. However, such a polishing slurry has a technical disadvantage in that the polishing speed is low.
Furthermore, in generations after a design rule of 0.25 μm, the shallow trench isolation is used to isolate elements in an integrated circuit. In the shallow trench isolation, in order to remove a silicon oxide film deposited in excess on a substrate, a CMP process is used. In order to stop the polishing, a stopper film low in the polishing speed is formed under the silicon oxide film. As the stopper film, a film such as silicon nitride film is used. The larger a ratio of the polishing speeds of the silicon oxide film to the stopper film, the more desirable. Since in an existing colloidal silica base polishing slurry the ratio of the polishing speeds of the silicon oxide film to the stopper film is such small as substantially 3, the polishing slurry does not have the characteristics practically usable in the shallow trench isolation.
On the other hand, as a polishing slurry of glass surfaces of such as photomasks and lenses, a cerium oxide polishing slurry is used. Cerium oxide particles are low in hardness in comparison with that of silica particles and alumina particles; as a result, a polishing surface is difficult to be scratched. Accordingly, it is useful for finish mirror polishing. Furthermore, it is advantageous in that the polishing speed is higher than that of the silica polishing slurry. Recently, a polishing slurry for use in the semiconductor CMP, which uses high purity cerium abrasive grains, is in use. The technology is disclosed in for instance Japanese Patent Application Laid-Open No. 10-106994.
Furthermore, it is known to add an additive to control the polishing speed of a cerium oxide polishing liquid and to improve global planarity. The technology is disclosed in for instance Japanese Patent Application Laid-Open No. 08-22970.
It is said that when a cerium oxide polishing slurry is applied to polish a semiconductor insulating film, a process is forwarded owing to a chemical action of cerium oxide and a mechanical removal action due to particles. However, the mechanical removal action due to particles causes polishing scratches. In this connection, a primary particle diameter of cerium oxide is selected so as to give a desirable polishing speed and a surface state such as polishing scratches; however, as far as the cerium oxide particles are used, a polished film surface free from the polishing scratches cannot be obtained. From now on, as a semiconductor device is advanced toward more multi-layered and higher definition, in order to improve a yield of semiconductor devices, a polishing slurry that is free from the polishing scratches and capable of polishing at a higher speed is indispensable. Still further, in order to realize the shallow trench isolation, a polishing slurry in which a ratio of the polishing speed of a silicon oxide insulating film to that of a silicon nitride insulating film is for instance 10 or more is necessary.